philips semiconductors product specification trenchmos ? transistor BUK9628-55 logic level fet general description quick reference data n-channel enhancement mode logic symbol parameter max. unit level field-effect power transistor in a plastic envelope suitable for surface v ds drain-source voltage 55 v mounting. using ' trench ' technology i d drain current (dc) 40 a the device features very low on-state p tot total power dissipation 96 w resistance and has integral zener t j junction temperature 175 ?c diodes giving esd protection up to r ds(on) drain-source on-state 28 m w 2kv. it is intended for use in resistance v gs = 5 v automotive and general purpose switching applications. pinning - sot404 pin configuration symbol pin description 1 gate 2 drain 3 source mb drain limiting values limiting values in accordance with the absolute maximum system (iec 134) symbol parameter conditions min. max. unit v ds drain-source voltage - - 55 v v dgr drain-gate voltage r gs = 20 k w -55v v gs gate-source voltage - - 10 v i d drain current (dc) t mb = 25 ?c - 40 a i d drain current (dc) t mb = 100 ?c - 28 a i dm drain current (pulse peak value) t mb = 25 ?c - 160 a p tot total power dissipation t mb = 25 ?c - 96 w t stg , t j storage & operating temperature - - 55 175 ?c esd limiting value symbol parameter conditions min. max. unit v c electrostatic discharge capacitor human body model - 2 kv voltage, all pins (100 pf, 1.5 k w ) thermal resistances symbol parameter conditions typ. max. unit r th j-mb thermal resistance junction to - - 1.56 k/w mounting base r th j-a thermal resistance junction to minimum footprint, fr4 50 - k/w ambient board d g s 13 mb 2 april 1998 1 rev 1.100
philips semiconductors product specification trenchmos ? transistor BUK9628-55 logic level fet static characteristics t j = 25?c unless otherwise specified symbol parameter conditions min. typ. max. unit v (br)dss drain-source breakdown v gs = 0 v; i d = 0.25 ma; 55 - - v voltage t j = -55?c 50 - - v v gs(to) gate threshold voltage v ds = v gs ; i d = 1 ma 1 1.5 2 v t j = 175?c 0.5 - - v t j = -55?c - - 2.3 i dss zero gate voltage drain current v ds = 55 v; v gs = 0 v; - 0.05 10 m a t j = 175?c - - 500 m a i gss gate source leakage current v gs = 5 v; v ds = 0 v - 0.02 1 m a t j = 175?c - 10 m a v (br)gss gate-source breakdown i g = 1 ma; 10 - - v voltage r ds(on) drain-source on-state v gs = 5 v; i d = 20 a - 22 28 m w resistance t j = 175?c - - 59 m w dynamic characteristics t mb = 25?c unless otherwise specified symbol parameter conditions min. typ. max. unit g fs forward transconductance v ds = 25 v; i d = 25 a 13 - - s c iss input capacitance v gs = 0 v; v ds = 25 v; f = 1 mhz - 1300 1700 pf c oss output capacitance - 250 300 pf c rss feedback capacitance - 130 180 pf t d on turn-on delay time v dd = 30 v; i d = 25 a; - 22 32 ns t r turn-on rise time v gs = 5 v; r g = 10 w - 85 125 ns t d off turn-off delay time resistive load - 70 95 ns t f turn-off fall time - 64 85 ns l d internal drain inductance measured from upper edge of drain - 2.5 - nh tab to centre of die l s internal source inductance measured from source lead - 7.5 - nh soldering point to source bond pad reverse diode limiting values and characteristics t j = 25?c unless otherwise specified symbol parameter conditions min. typ. max. unit i dr continuous reverse drain - - 40 a current i drm pulsed reverse drain current - - 160 a v sd diode forward voltage i f = 25 a; v gs = 0 v - 0.95 1.2 v i f = 40 a; v gs = 0 v - 1.0 - t rr reverse recovery time i f = 40 a; -di f /dt = 100 a/ m s; - 41 - ns q rr reverse recovery charge v gs = -10 v; v r = 30 v - 0.16 - m c april 1998 2 rev 1.100
philips semiconductors product specification trenchmos ? transistor BUK9628-55 logic level fet avalanche limiting value symbol parameter conditions min. typ. max. unit w dss drain-source non-repetitive i d = 35 a; v dd 25 v; - - 70 mj unclamped inductive turn-off v gs = 5 v; r gs = 50 w ; t mb = 25 ?c energy fig.1. normalised power dissipation. pd% = 100 p d /p d 25 ?c = f(t mb ) fig.2. normalised continuous drain current. id% = 100 i d /i d 25 ?c = f(t mb ); conditions: v gs 3 5 v fig.3. safe operating area. t mb = 25 ?c i d & i dm = f(v ds ); i dm single pulse; parameter t p fig.4. transient thermal impedance. z th j-mb = f(t); parameter d = t p /t 0 20 40 60 80 100 120 140 160 180 tmb / c pd% normalised power derating 120 110 100 90 80 70 60 50 40 30 20 10 0 1 10 100 1 10 100 1000 id/a vds/v rds(on) = vds/id tp = 1 us 10us 100 us 1 ms 10ms 100ms dc 0 20 40 60 80 100 120 140 160 180 tmb / c id% normalised current derating 120 110 100 90 80 70 60 50 40 30 20 10 0 1.0e-06 0.0001 0.01 1 100 0.01 0.1 1 10 zth/ (k/w) t/s 0.5 0.2 0.1 0.05 0.02 0 d = t p t p t t p t d april 1998 3 rev 1.100
philips semiconductors product specification trenchmos ? transistor BUK9628-55 logic level fet fig.5. typical output characteristics, t j = 25 ?c . i d = f(v ds ); parameter v gs fig.6. typical on-state resistance, t j = 25 ?c . r ds(on) = f(i d ); parameter v gs fig.7. typical transfer characteristics. i d = f(v gs ) ; conditions: v ds = 25 v; parameter t j fig.8. typical transconductance, t j = 25 ?c . g fs = f(i d ); conditions: v ds = 25 v fig.9. normalised drain-source on-state resistance. a = r ds(on) /r ds(on)25 ?c = f(t j ); i d = 20 a; v gs = 5 v fig.10. gate threshold voltage. v gs(to) = f(t j ); conditions: i d = 1 ma; v ds = v gs 0246810 0 20 40 60 80 100 id/a vds/v vgs/v = 10 8 6 4.8 4.6 4.4 4.2 4.0 3.8 3.6 3.4 3.2 3.0 2.8 2.6 2.4 2.2 2.0 5 0 1020304050607080 5 10 15 20 25 30 35 40 gfs/s id/a 0 10203040506070 20 22 24 26 28 30 32 34 rds(on)/mohm vgs/v = id/a 4 4.2 4.4 4.6 4.8 5 -100 -50 0 50 100 150 200 0.5 1 1.5 2 2.5 buk959-60 tmb / degc rds(on) normlised to 25degc a 0123456 0 10 20 30 40 50 60 70 80 id/a vgs/v tj/c = 175 25 buk959-60 -100 -50 0 50 100 150 200 0 0.5 1 1.5 2 2.5 tj / c vgs(to) / v max. typ. min. april 1998 4 rev 1.100
philips semiconductors product specification trenchmos ? transistor BUK9628-55 logic level fet fig.11. sub-threshold drain current. i d = f(v gs) ; conditions: t j = 25 ?c; v ds = v gs fig.12. typical capacitances, c iss , c oss , c rss . c = f(v ds ); conditions: v gs = 0 v; f = 1 mhz fig.13. typical turn-on gate-charge characteristics. v gs = f(q g ); conditions: i d = 40 a; parameter v ds fig.14. typical reverse diode current. i f = f(v sds ); conditions: v gs = 0 v; parameter t j fig.15. normalised avalanche energy rating. w dss % = f(t mb ); conditions: i d = 40 a fig.16. avalanche energy test circuit. 0 0.5 1 1.5 2 2.5 3 1e-05 1e-05 1e-04 1e-03 1e-02 1e-01 sub-threshold conduction 2% typ 98% 0 0.5 1 1.5 0 20 40 60 80 100 if/a vsds/v tj/c = 175 25 0.01 0.1 1 10 100 0 .5 1 1.5 2 2.5 3 thousands pf vds/v ciss coss crss 20 40 60 80 100 120 140 160 180 tmb / c 120 110 100 90 80 70 60 50 40 30 20 10 0 wdss% 0 5 10 15 20 25 30 0 1 2 3 4 5 6 vgs/v qg/nc vds = 14v vds = 44v l t.u.t. vdd rgs r 01 vds -id/100 + - shunt vgs 0 w dss = 0.5 li d 2 bv dss /( bv dss - v dd ) april 1998 5 rev 1.100
philips semiconductors product specification trenchmos ? transistor BUK9628-55 logic level fet fig.17. switching test circuit. rd t.u.t. vdd rg vds + - vgs 0 april 1998 6 rev 1.100
philips semiconductors product specification trenchmos ? transistor BUK9628-55 logic level fet mechanical data dimensions in mm net mass: 1.4 g fig.18. sot404 : centre pin connected to mounting base. mounting instructions dimensions in mm fig.19. sot404 : soldering pattern for surface mounting . notes 1. observe the general handling precautions for electrostatic-discharge sensitive devices (esds) to prevent damage to mos gate oxide. 2. epoxy meets ul94 v0 at 1/8". 11 max 4.5 max 1.4 max 10.3 max 0.5 15.4 2.5 0.85 max (x2) 2.54 (x2) 17.5 11.5 9.0 5.08 3.8 2.0 april 1998 7 rev 1.100
philips semiconductors product specification trenchmos ? transistor BUK9628-55 logic level fet definitions data sheet status objective specification this data sheet contains target or goal specifications for product development. preliminary specification this data sheet contains preliminary data; supplementary data may be published later. product specification this data sheet contains final product specifications. limiting values limiting values are given in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of this specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information where application information is given, it is advisory and does not form part of the specification. philips electronics n.v. 1998 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. life support applications these products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips for any damages resulting from such improper use or sale. april 1998 8 rev 1.100
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